AD7623ASTZRL Ver la hoja de datos (PDF) - Analog Devices
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AD7623ASTZRL Datasheet PDF : 28 Pages
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AD7623
CS, RD
t3
CNVST
EXT/INT = 0
RDC/SDIN = 0
INVSCLK = INVSYNC = 0
BUSY
SYNC
SCLK
SDOUT
t29
t14
t15
t16
t28
t18
t19
t20
t21
1
2
3
X
D15
D14
t22
t23
t30
t25
t24
t26
14
15
16
t27
D2
D1
D0
Figure 37. Master Serial Data Timing for Reading (Read After Convert)
CS, RD
CNVST
BUSY
EXT/INT = 0
t1
t3
RDC/SDIN = 1
INVSCLK = INVSYNC = 0
SYNC
SCLK
SDOUT
t17
t14
t19
t20 t21
t15
1
2
3
t18
X
D15
D14
t25
t24
t26
14
15
16
t27
D2
D1
D0
t16
t22
t23
Figure 38. Master Serial Data Timing for Reading (Read Previous Conversion During Convert)
Rev. 0 | Page 23 of 28
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