AD7262 Ver la hoja de datos (PDF) - Analog Devices
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AD7262 Datasheet PDF : 33 Pages
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Data Sheet
MICROPROCESSOR INTERFACING
The serial interface on the AD7262/AD7262-5 allows the parts
to connect directly to a range of different microprocessors. This
section explains how to interface the AD7262/AD7262-5 with
the Analog Devices, Inc., Blackfin® DSP, the ADSP-BF531.
AD7262/AD7262-5 TO ADSP-BF531
The ADSP-BF531 and the rest of the Blackfin microprocessor
family of DSPs interface directly to the AD7262/AD7262-5
without any glue logic required. The VDRIVE pin of the AD7262/
AD7262-5 takes the same supply voltage as that of the
ADSP-BF531. This allows the ADC to operate at a higher
supply voltage than its serial interface and, therefore, the
ADSP-BF531, if necessary. The availability of secondary receive
registers on the serial ports of the Blackfin DSPs means only
one serial port is necessary to read from both DOUT pins
simultaneously. Figure 37 shows both DOUTAand DOUTBof the
AD7262/AD7262-5 connected toSerial Port 0 of the ADSP-BF531.
The SPORT0 Receive Configuration 1 register and SPORT0
Receive Configuration 2 register must be set up as outlined in
Table 14 and Table 15.
AD72621
DOUTA
SCLK
CS
DOUTB
VDRIVE
SERIAL
DEVICE A
(PRIMARY)
SERIAL
DEVICE B
(SECONDARY)
ADSP-BF5311
SPORT0
DR0PRI
RCLK0
RFS0
DR0SEC
VDD
1ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 37. Interfacing the AD7262 to the ADSP-BF531
AD7262
Table 14. The SPORT0 Receive Configuration 1 Register
(SPORT0_RCR1)
Setting
Description
RCKFE = 1
Sample data with falling edge of RSCLK
LRFS = 1
Active low frame signal
RFSR = 1
Frame every word
IRFS = 1
Internal receive frame sync (RFS) used
RLSBIT = 0
Receive MSB first
RDTYPE = 00
Zero fill
IRCLK = 1
Internal receive clock
RSPEN = 1
Receive enabled
SLEN = 11110
31-bit data-word
TFSR = RFSR = 1
Table 15. The SPORT0 Receive Configuration 2 Register
(SPORT0_RCR2)
Setting
Description
RXSE = 1
Secondary side enabled
Rev. B | Page 29 of 32
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