AD7819YRZ Ver la hoja de datos (PDF) - Analog Devices

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AD7819YRZ

2.7 V to 5.5 V, 200 kSPS 8-Bit Sampling ADC

Analog Devices 

AD7819

Pin

No.

Mnemonic

1

VREF

2

VIN

3

GND

4

CONVST

5

6

7

8–15

16

CS

RD

BUSY

DB0–DB7

VDD

PIN FUNCTION DESCRIPTIONS

Description

Reference Input, 1.2 V to VDD.

Analog Input, 0 V to VREF.

Analog and Digital Ground.

Convert Start. A low-to-high transition on this pin initiates a 1.5 µs pulse on an internally generated

CONVST signal. A high-to-low transition on this line initiates the conversion process if the internal

CONVST signal is low. Depending on the signal on this pin at the end of a conversion, the AD7819

automatically powers down.

Chip Select. This is a logic input. CS is used in conjunction with RD to enable outputs.

Read Pin. This is a logic input. When CS is low and RD goes low, the DB7–DB0 leave their high

impedance state and data is driven onto the data bus.

ADC Busy Signal. This is a logic output. This signal goes logic high during the conversion process.

Data Bit 0 to 7. These outputs are three-state TTL-compatible.

Positive power supply voltage, 2.7 V to 5.5 V.

PIN CONFIGURATION

DIP/SOIC

VREF 1

16 VDD

VIN 2

15 DB7

GND 3

14 DB6

CONVST 4 AD7819 13 DB5

CS

5

TOP VIEW

(Not to Scale) 12 DB4

RD 6

11 DB3

BUSY 7

10 DB2

DB0 8

9 DB1

–4–

REV. B

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