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AD5203

4-Channel, 64-Position Digital Potentiometer

Analog Devices 

AD5203–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS (VDD = +3 V ؎ 10% or +5 V ؎ 10%, VA = +VDD, VB = 0 V, –40؇C < TA < +85؇C unless

otherwise noted)

Parameter

Symbol Conditions

DC CHARACTERISTICS RHEOSTAT MODE Specifications Apply to All VRs

Resistor Differential NL2

Resistor Nonlinearity Error2

Nominal Resistor Tolerance3

R-DNL

R-INL

∆RAB

RWB, VA = No Connect

RWB, VA = No Connect

Resistance Temperature Coefficient

∆RAB/∆T VAB = VDD, Wiper = No Connect

Wiper Resistance

RW

IW = 1 V/RAB

Nominal Resistance Match

∆R/RO

CH 1 to CH 2, VAB = VDD , TA = +25°C

DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE Specifications Apply to All VRs

Resolution

N

Differential Nonlinearity Error4

DNL

Integral Nonlinearity Error4

INL

Voltage Divider Temperature Coefficient

Full-Scale Error

Zero-Scale Error

∆VW/∆T

VWFSE

VWZSE

Code = 20H

Code = 3FH

Code = 00H

RESISTOR TERMINALS

Voltage Range5

Capacitance6 Ax, Bx

Capacitance6 Wx

Shutdown Supply Current7

Shutdown Wiper Resistance

VA, VB, VW

CA, CB

CW

IA_SD

RW_SD

f = 1 MHz, Measured to GND, Code = 20H

f = 1 MHz, Measured to GND, Code = 20H

VA = VDD, VB = 0 V, SHDN = 0

VA = VDD, VB = 0 V, SHDN = 0, VDD = +5 V

DIGITAL INPUTS AND OUTPUTS

Input Logic High

VIH

Input Logic Low

VIL

Input Logic High

VIH

Input Logic Low

VIL

Output Logic High

VOH

Output Logic Low

VOL

Input Current

IIL

Input Capacitance6

CIL

VDD = +5 V

VDD = +5 V

VDD = +3 V

VDD = +3 V

RL = 2.2 kΩ to VDD

IOL = 1.6 mA, VDD = +5 V

VIN = 0 V or +5 V, VDD = +5 V

POWER SUPPLIES

Power Supply Range

Supply Current (CMOS)

Supply Current (TTL)8

Power Dissipation (CMOS)9

Power Supply Sensitivity

VDD Range

IDD

IDD

PDISS

PSS

PSS

VIH = VDD or VIL = 0 V

VIH = 2.4 V or VIL = 0.8 V, VDD = +5.5 V

VIH = VDD or VIL = 0 V, VDD = +5.5 V

∆VDD = +5 V ± 10%

∆VDD = +3 V ± 10%

DYNAMIC CHARACTERISTICS6, 10

Bandwidth –3 dB

Total Harmonic Distortion

VW Settling Time

Resistor Noise Voltage

Crosstalk11

BW_10K

BW_100K

THDW

tS_10K

tS_100K

eNWB

CT

RAB = 10 kΩ

RAB = 100 kΩ

VA =1 V rms + 2 V dc, VB = 2 V dc, f = 1 kHz

VA = VDD, VB = 0 V, ±1 LSB Error Band

VA = VDD, VB = 0 V, ±1 LSB Error Band

RWB = 5 kΩ, f = 1 kHz, RS = 0

RWB = 50 kΩ, f = 1 kHz, RS = 0

VA = VDD, VB = 0 V

INTERFACE TIMING CHARACTERISTICS Applies to All Parts6, 12

Input Clock Pulsewidth

Data Setup Time

Data Hold Time

CLK to SDO Propagation Delay13

CS Setup Time

CS High Pulsewidth

Reset Pulsewidth

CLK Fall to CS Rise Hold Time

CS Rise to Clock Rise Setup

tCH, tCL

tDS

tDH

tPD

tCSS

tCSW

tRS

tCSH

tCS1

Clock Level High or Low

RL = 2.2 kΩ, CL < 20 pF

Min

–0.25

–0.5

–30

6

–0.25

–0.75

–0.75

0

0

2.4

2.1

VDD–0.1

2.7

10

5

5

1

10

10

50

0

10

Typ1 Max Units

± 0.1 +0.25 LSB

± 0.1 +0.5 LSB

+30 %

700

ppm/°C

45

100 Ω

0.2

1

%

Bits

± 0.1 +0.25 LSB

± 0.1 +0.75 LSB

20

ppm/°C

–0.2 0

LSB

+0.1 +0.75 LSB

VDD

V

75

pF

120

pF

0.01 5

µA

45

100 Ω

V

0.8 V

V

0.6 V

V

0.4 V

±1

µA

5

pF

5.5 V

0.01 5

µA

0.9

4

mA

27.5 µW

0.0002 0.001 %/%

0.006 0.03 %/%

600

71

0.003

2

18

9

29

–65

kHz

kHz

%

µs

µs

nV/√Hz

nV/√Hz

dB

ns

ns

ns

25

ns

ns

ns

ns

ns

ns

–2–

REV. 0

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