NXP Semiconductors
74LV4051
8-channel analog multiplexer/demultiplexer
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
VEXT
RL
RT
VEE
CL
RL
001aak353
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 15. Test circuit for measuring switching times
Table 10. Test data
Supply voltage Input
VCC
< 2.7 V
2.7 V to 3.6 V
VI
VCC
2.7 V
> 3.6 V
VCC
tr, tf
≤ 6 ns
≤ 6 ns
≤ 6 ns
Load
CL
50 pF
15 pF, 50 pF
50 pF
RL
1 kΩ
1 kΩ
1 kΩ
VEXT
tPHL, tPLH
open
open
open
tPZH, tPHZ
VEE
VEE
VEE
tPZL, tPLZ
2VCC
2VCC
2VCC
74LV4051_4
Product data sheet
Rev. 04 — 10 August 2009
© NXP B.V. 2009. All rights reserved.
14 of 26