74LV10 Ver la hoja de datos (PDF) - Philips Electronics
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74LV10 Datasheet PDF : 10 Pages
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Philips Semiconductors
Triple 3-input NAND gate
Product specification
74LV10
PIN CONFIGURATION
LOGIC SYMBOL
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 VCC
13 1C
12 1Y
11 3C
10 3B
9 3A
8 3Y
SV00416
LOGIC SYMBOL (IEEE/IEC)
1
2
&
13
12
3
4
&
5
6
9
10
&
11
8
SV00418
1 1A
2 1B
13 1C
3 2A
4 2B
5 2C
9 3A
10 3B
11 3C
1Y 12
2Y 6
3Y 8
SV00417
LOGIC DIAGRAM (ONE GATE)
A
B
Y
C
SV00419
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP.
MAX
UNIT
VCC
VI
VO
Tamb
DC supply voltage
Input voltage
Output voltage
Operating ambient temperature range in free air
See Note1
See DC and AC
characteristics
1.0
3.3
3.6
V
0
–
VCC
V
0
–
VCC
V
–40
–40
+85
+125
°C
tr, tf
Input rise and fall times
VCC = 1.0V to 2.0V
–
–
500
VCC = 2.0V to 2.7V
–
–
200
ns/V
VCC = 2.7V to 3.6V
–
–
100
NOTE:
1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 3.6V.
1998 Apr 20
3
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