74HC112 Ver la hoja de datos (PDF) - Philips Electronics
Número de pieza
componentes Descripción
fabricante
74HC112 Datasheet PDF : 15 Pages
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Philips Semiconductors
Dual JK flip-flop with set and reset;
negative-edge trigger
Product specification
74HC/HCT112
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
SYMBOL
PARAMETER
74HC
+25
−40 to +85
min. typ. max. min. max.
tPHL/ tPLH
propagation delay
nCP to nQ
tPHL/ tPLH
propagation delay
nCP to nQ
tPHL/ tPLH
propagation delay
nRD to nQ, nQ
tPHL/ tPLH
propagation delay
nSD to nQ, nQ
tTHL/ tTLH output transition time
80
tW
clock pulse width
HIGH or LOW
16
14
80
tW
set or reset pulse width
LOW
16
14
80
trem
removal time
nRD to nCP
16
14
80
trem
removal time
nSD to nCP
16
14
80
tsu
set-up time
nJ, nK to nCP
16
14
0
th
hold time
nJ, nK to nCP
0
0
6
fmax
maximum clock pulse
frequency
30
35
55 175
20 35
16 30
55 175
20 35
16 30
58 180
21 36
17 31
50 155
18 31
14 26
19 75
7 15
6 13
22
8
6
22
8
6
22
8
6
−19
−7
−6
19
7
6
−11
−4
−3
20
60
71
220
44
37
220
44
37
225
45
38
295
39
33
95
19
16
100
20
17
100
20
17
125
25
21
100
20
17
100
20
17
0
0
0
4.8
24
28
UNIT
−40 to +125
min. max.
265
53
45
265
53
45
270
54
46
235
47
40
110
22
19
120
24
20
120
24
20
150
30
26
120
24
20
120
24
20
0
0
0
4.0
20
24
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
TEST CONDITIONS
VCC WAVEFORMS
(V)
2.0
4.5 Fig.6
6.0
2.0
4.5 Fig.6
6.0
2.0
4.5 Fig.7
6.0
2.0
4.5 Fig.7
6.0
2.0
4.5 Fig.6
6.0
2.0
4.5 Fig.6
6.0
2.0
4.5 Fig.7
6.0
2.0
4.5 Fig.7
6.0
2.0
4.5 Fig.7
6.0
2.0
4.5 Fig.6
6.0
2.0
4.5 Fig.6
6.0
2.0
4.5 Fig.6
6.0
1998 Jun 10
6
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