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74F403A

First-In First-Out (FIFO) Buffer Memory

Fairchild Semiconductor 

Timing Waveforms (Continued)

Conditions: stack not full, IES LOW when initialized

NOTE A:TTS normally connected to IRF.

NOTE B: If stack is full, IRF will stay LOW.

FIGURE 17. Parallel Load Mode, 4-Bit Word (Unexpanded) or Master in Parallel Expansion

Conditions: stack not full, device initialized (Note 3) with IES HIGH

FIGURE 18. Parallel Load, Slave Mode

Note 3: Initialization requires a master reset to occur after power has been applied.

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