Philips Semiconductors
Quad 2-input multiplexer; 3-state
Product specification
74AHC257;
74AHCT257
handbook, full pagewidth
OE input
VI
GND
output
LOW-to-OFF
OFF-to-LOW
VCC
VOL
output
HIGH-to-OFF
OFF-to-HIGH
VOH
GND
VM(1)
tPLZ
tPZL
tPHZ
VOL + 0.3 V
VOH − 0.3 V
VM(2)
tPZH
VM(2)
outputs
enabled
outputs
disabled
outputs
enabled
MNA450
FAMILY
AHC
AHCT
VI INPUT
VM(1)
REQUIREMENTS INPUT
GND to VCC
GND to 3.0 V
50% VCC
1.5 V
VM(2)
OUTPUT
50% VCC
50% VCC
Fig.7 3-state enable and disable times.
handbook, full pagewidth
PULSE
VI
GENERATOR
VCC
VO
D.U.T.
RT
S1
1000 Ω
VCC
open
GND
CL
MNA219
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
open
VCC
GND
2000 Apr 03
Definitions for test circuit.
CL = load capacitance including jig and probe capacitance (See Chapter “AC characteristics”).
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.8 Load circuitry for switching times.
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