Philips Semiconductors
Octal D-type transparent latch; 3-state
Product specification
74AHC373; 74AHCT373
74AHCT373
Ground = 0 V; tr = tf ≤ 3.0 ns.
SYMBOL PARAMETER
TEST CONDITIONS
WAVEFORMS
CL
Tamb (°C)
25
−40 to +85 −40 to +125 UNIT
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
VCC = 4.5 to 5.5 V; note 1
tPHL/tPLH propagation delay see Figs 7 and 11 15 pF −
4.0
Dn to Qn
propagation delay see Figs 8 and 11
−
4.3
LE to Qn
tPZH/tPZL propagation delay see Figs 9 and 11
OE to Qn
−
4.0
tPHZ/tPLZ propagation delay
OE to Qn
−
4.4
tPHL/tPLH propagation delay see Figs 7 and 11 50 pF −
5.2
Dn to Qn
propagation delay see Figs 8 and 11
−
5.5
LE to Qn
tPZH/tPZL propagation delay see Figs 9 and 11
OE to Qn
−
5.2
tPHZ/tPLZ propagation delay
OE to Qn
−
6.5
tW
clock pulse width see Figs 8 and 11
HIGH or LOW
6.5 −
tsu
set-up time
see Figs 10 and 11
Dn to CP
th
hold time
Dn to CP
3.5 −
1.5 −
8.5 1.0 9.5 1.0 11.0 ns
12.3 1.0 13.5 1.0 15.5 ns
10.9 1.0 12.5 1.0 14.0 ns
10.2 1.0 11.0 1.0 13.0 ns
9.5 1.0 10.5 1.0 12.0 ns
13.3 1.0 14.5 1.0 17.0 ns
11.9 1.0 13.5 1.0 15.0 ns
11.2 1.0 12.0 1.0 14.0 ns
−
6.5 −
6.5 −
ns
−
3.5 −
3.5 −
ns
−
1.5 −
1.5 −
ns
Note
1. Typical values at VCC = 5.0 V.
1999 Nov 23
11