NXP Semiconductors
74AHC02; 74AHCT02
Quad 2-input NOR gate
Table 1. Ordering information …continued
Type number Package
Temperature range Name
74AHCT02
74AHCT02D
−40 °C to +125 °C SO14
74AHCT02PW −40 °C to +125 °C TSSOP14
74AHCT02BQ −40 °C to +125 °C DHVQFN14
Description
Version
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
4. Functional diagram
2 1A
3 1B
5 2A
6 2B
8 3A
9 3B
11 4A
12 4B
1Y 1
2Y 4
3Y 10
4Y 13
mna216
Fig 1. Logic symbol
2
≥1
3
1
5
≥1
6
4
8
≥1
9
10
11
≥1
12
13
001aah084
Fig 2. IEC logic symbol
A
Y
B
mna215
Fig 3. Logic diagram (one gate)
74AHC_AHCT02_4
Product data sheet
Rev. 04 — 21 May 2008
© NXP B.V. 2008. All rights reserved.
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