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74ACT74MTC(2008) Ver la hoja de datos (PDF) - Fairchild Semiconductor

Número de pieza
componentes Descripción
fabricante
74ACT74MTC
(Rev.:2008)
Fairchild
Fairchild Semiconductor 
74ACT74MTC Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
January 2008
74AC74, 74ACT74
Dual D-Type Positive Edge-Triggered Flip-Flop
Features
ICC reduced by 50%
Output source/sink 24mA
ACT74 has TTL-compatible inputs
General Description
The AC/ACT74 is a dual D-type flip-flop with Asynchro-
nous Clear and Set inputs and complementary (Q, Q)
outputs. Information at the input is transferred to the out-
puts on the positive edge of the clock pulse. Clock trig-
gering occurs at a voltage level of the clock pulse and is
not directly related to the transition time of the positive-
going pulse. After the Clock Pulse input threshold volt-
age has been passed, the Data input is locked out and
information present will not be transferred to the outputs
until the next rising edge of the Clock Pulse input.
Asynchronous Inputs:
LOW input to SD (Set) sets Q to HIGH level
LOW input to CD (Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on CD and SD makes both Q and
Q HIGH
Ordering Information
Order Number
74AC74SC
74AC74SJ
74AC74MTC
74AC74PC
74ACT74SC
74ACT74SJ
74ACT74MTC
74ACT74PC
Package
Number
M14A
M14D
MTC14
N14A
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1988 Fairchild Semiconductor Corporation
74AC74, 74ACT74 Rev. 1.6.1
www.fairchildsemi.com

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