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AD7302 Datasheet PDF : 16 Pages
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AD7302–SPECIFICATIONS (VDD = +2.7 V to +5.5 V, Internal Reference; CL = 100 pF, RL = 10 kto VDD and GND;
to TMAX unless otherwise noted)
Parameter
B Versions1
Units
Conditions/Comments
STATIC PERFORMANCE
Resolution
Relative Accuracy
Differential Nonlinearity
Full-Scale Error
Zero Code Error @ 25°C
Gain Error3
Zero Code Temperature Coefficient
8
±1
±1
–0.75
3
±1
100
Bits
LSB max
LSB max
LSB typ
LSB typ
% FSR typ
µV/°C typ
Note 2
Guaranteed Monotonic
All Zeroes Loaded to DAC Register
DAC REFERENCE INPUT
REFIN Input Range
REFIN Input Impedance
1.0 to VDD/2
10
V min to max
Mtyp
OUTPUT CHARACTERISTICS
Output Voltage Range
Output Voltage Settling Time
Slew Rate
Digital to Analog Glitch Impulse
Digital Feedthrough
Digital Crosstalk
Analog Crosstalk
DC Output Impedance
Short Circuit Current
Power Supply Rejection Ratio4
LOGIC INPUTS
Input Current
VINL, Input Low Voltage
VINL, Input Low Voltage
VINH, Input High Voltage
VINH, Input High Voltage
Pin Capacitance
0 to VDD
2
7.5
1
0.2
0.2
± 0.2
40
14
0.0003
± 10
0.8
0.6
2.4
2.1
7
V min to max
µs max
V/µs typ
nV-s typ
nV-s typ
nV-s typ
LSB typ
typ
mA typ
%/% max
µA max
V max
V max
V min
V min
pF max
Typically 1.2 µs
1 LSB Change Around Major Carry
VDD = ± 10%
VDD = +5 V
VDD = +3␣ V
VDD = +5 V
VDD = +3 V
POWER REQUIREMENTS
VDD
IDD
VDD = 3.3 V
@ 25°C
@ TMIN to TMAX
VDD = 5.5 V
@ 25°C
@ TMIN to TMAX
IDD (Full Power-Down)
@ 25°C
TMIN to TMAX
2.7/5.5
2.8
3
4.5
5
1
2
V min/max
mA max
mA max
mA max
mA max
µA max
µA max
NOTES
1Temperature ranges are as follows: B Version: –40°C to +105°C.
2Relative Accuracy is calculated using a reduced code range of 15 to 245.
3Gain error is specified between Codes 15 and 245. The actual error at Code 15 is typically 3 LSB.
4Guaranteed by characterization at product release, not production tested.
Specifications subject to change without notice.
Both DACs Active and Excluding Load Currents
VIH = VDD and VIL = GND
Typically 2.3 mA
See Figures 6 and 7
VIH = VDD and VIL = GND
Typically 2.8 mA
See Figures 6 and 7
VIH = VDD and VIL = GND
See Figure 18
–2–
REV. 0

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