RAS#
V
V
IH
IL
CASL#/CASH#
V IH
V IL
ADDR
V
V
IH
IL
WE# VIH
V IL
DQ VVOOHL
V IH
OE# VIL
READ CYCLE
tRC
tRAS
16Mb: 1 MEG x16
EDO DRAM
tRP
tCRP
tRCD
tCSH
tRSH
tCAS
tCLCH
tRRH
tASR
tRAD
tRAH
ROW
tAR
tASC
tCAH
tACH
tRCS
COLUMN
tRCH
ROW
OPEN
tAA
tRAC
tCAC
tCLZ
tOE
NOTE 1
tOFF
VALID DATA
tOD
OPEN
DON’T CARE
UNDEFINED
TIMING PARAMETERS
SYMBOL
tAA
tACH
tAR
tASC
tASR
tCAC
tCAH
tCAS
tCLCH
tCLZ
tCRP
tCSH
tOD
-5
MIN
MAX
25
12
38
0
0
13
8
8
10,000
5
0
5
38
0
12
-6
MIN
MAX
30
15
45
0
0
15
10
10
10,000
5
0
5
45
0
15
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL
tOE
tOFF
tRAC
tRAD
tRAH
tRAS
tRC
tRCD
tRCH
tRCS
tRP
tRRH
tRSH
-5
MIN
MAX
12
0
12
50
9
9
50
10,000
84
11
0
0
30
0
13
-6
MIN
MAX
15
0
15
60
12
10
60
10,000
104
14
0
0
40
0
15
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTE: 1. tOFF is referenced from rising edge of RAS# or CAS#, whichever occurs last.
1 Meg x 16 EDO DRAM
D52_B.p65 – Rev. B; Pub. 3/01
12
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc