W986416CH
Control Timing of Input Data
(Word Mask)
CLK
tCMH
tCMS
tCMH
DQM
DQ0 -15
tDS
tDH
Valid
Data-in
(Clock Mask)
CLK
tCKH
tCKS
tCKH
CKE
DQ0 -15
tDS
tDH
Valid
Data-in
tDS
tDH
Valid
Data-in
1M x 16 bit x 4 Banks SDRAM
tCMS
tDS
tDH
Valid
Data-in
tDS
tDH
Valid
Data-in
tDS
tDH
Valid
Data-in
tCKS
tDS
tDH
Valid
Data-in
tDS
tDH
Valid
Data-in
Control Timing of Output Data
(Output Enable)
CLK
tCMH
tCMS
tCMH
DQM
DQ0 -15
(Clock Mask)
tAC
tOH
tAC
tOH
Valid
Data-Out
tCMS
tHZ
tOH
Valid
Data-Out
tAC
tLZ
OPEN
CLK
CKE
DQ0 -15
tCKH
tCKS
tCKH
tCKS
tAC
tOH
tAC
tOH
Valid
Data-Out
Valid
Data-Out
tAC
tOH
tAC
tOH
Valid
Data-Out
tAC
tOH
Valid
Data-Out
Revision 1.2
- 17 -
Publication Release Date: June, 1999