NXP Semiconductors
74AHC132; 74AHCT132
Quad 2-input NAND Schmitt trigger
VI 90 %
tW
negative
pulse
VM
GND
10 %
tf
tr
VI
90 %
positive
pulse
VM
10 %
GND
tW
VCC
VI
G
DUT
RT
VM
tr
tf
VM
VO
CL
001aah768
Fig 7.
Test data is given in Table 9.
Definitions test circuit:
RT = termination resistance should be equal to output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
Load circuitry for measuring switching times
Table 9. Test data
Type
74AHC132
74AHCT132
Input
VI
VCC
3.0 V
tr, tf
≤ 3.0 ns
≤ 3.0 ns
Load
CL
50 pF, 15 pF
50 pF, 15 pF
Test
tPLH, tPHL
tPLH, tPHL
74AHC_AHCT132_6
Product data sheet
Rev. 06 — 4 May 2009
© NXP B.V. 2009. All rights reserved.
8 of 17