
Chapter Five
Operating Registers
PREUMINARY
Table 5-1. Operating Register Addresses and Descriptions (Continued)
Memory
or 1/0
20
21
22
23
24-26
27
28-2B
2C-2F
30-33
34-37
38
39
3A
3B
3C-3F
40
41
42
43
44
45
46
47
48
49
4A
4B
4C
4D
4E
4F
50
51-53
54
55-57
58
59-5B
5C-5F
Config
MemJl/O
AO
Al
A2
A3
A4-A6
A7
A8-AB
AC-AF
BO-B3
B4-B7
B8
B9
BA
BB
BC-BF
CO
Cl
C2
C3
C4
C5
C6
C7
C8
C9
CA
C7
CC
CD
CE
CF
DO
DI-D3
D4
D5-D7
D8
D9-DB
DC-DF
Readl
Write
RJW
RJW
RJW
RJW
RJW
RJW
RJW
RJW
RJW
RJW
RJW
RJW
RJW
RJW
R
RJW
, RJW
R
R
RJW
RJW
RJW
RJW
RJW
RJW
R
R
RJW
RJW
R
RJW
R
RJW
Label
DFIFO
CTEST4
CTEST5
CTEST6
DBC
DCMD
DNAD
DSP
DSPS
SCRATCH A
DMODE
DIEN
DWT
DCNIL
ADDER
SIENO
SIENI
SISTO
SISTI
SLPAR
Reserved
MACNIL
GPCNTL
STIMEO
STIMEI
RESPID
Reserved
STESTO
STESTI
STEST2
STEST3
SIDL
Reserved
SODL
Reserved
SBDL
. Reserved
SCRATCHB
Description
DMAFIFO
Chip Test 4
Chip Test 5
Chip Test 6
DMA Byte Counter
DMACommand
DMA Next Address for Data
DMA SCRIPTS Pointer
DMA SCRIPTS Pointer Save
General Purpose Scratch
Pad A
DMAMode
DMA Interrupt Enable
DMA Watchdog Timer
DMAControl
Swn output ofintemal adder
SCSI Interrupt Enable 0 .
SCSI Interrupt Enable 1
SCSI Interrupt Status 0
SCSI Interrupt Status 1
SCSI Longitudinal Parity
Memory Access Control
General Purpose Control
SCSI Timer 0
SCSI Timer 1-
Response ID
SCSI Test 0
SCSI Test 1
SCSI Test 2
SCSI Test 3
SCSI Input Data Latch
SCSI Output Data Latch
SCSI Bus Data Lines
General Purpose Scratch
Pad B
5-2
NCR 53C81 0 Data Manual