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SPC11A Datasheet PDF : 14 Pages
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Preliminary
SPC11A
6. FUNCTIONAL DESCRIPTIONS
6.1. CPU
The microprocessor in SPC11A is a high performance 8-bit
processor equipped Accumulator, Program Counter, X Register,
Stack pointer and Processor Status Register (the same as the
6502 instruction structure). The maximum CPU speed of 6.0MHz
is capable of bringing you the cleaner speech, pleasant music as
well as achieving the best performance.
6.2. ROM Area
The ROM area in SPC11A is 12K-byte that can be used for
program as well as data.
6.3. RAM Area
The total RAM size is 64-bytes (including Stack) starting from
address $C0 through $FF.
6.4. Map of Memory and I/Os
*I/O PORT:
- PORT IOC $0004
IOD $0005
- I/O CONFIG $0000
$0001
*NMI SOURCE:
- INTA (from TIMER A)
*INT SOURCE:
- INTA (from TIMER A)
- INTB (from TIMER B)
- CPU CLK / 1024
- CPU CLK / 8192
- CPU CLK / 65536
- EXT INT
*MEMORY MAP (From ROM view)
$0000
$00C0
$0100
$0400
$0600
Hardware register, I/Os
USER RAM and STACK
UNUSED
SUNPLUS TEST
PROGRAM
$2FFF
USER'S PROGRAM &
DATA AREA
DUMMY AREA
$7C00
$7FFF
USER'S PROGRAM &
DATA AREA
6.5. I/O Port Configuration*
Input/Output IOC port : IOC7 - IOC6
logic_2
control
VDD
90K
output
data
buffer or
OD-NMOS
input data
OD : Open Drain
Input/Output IOC port : IOC2 - IOC1
logic_2
control
VDD
90K
output
data
buffer or
OD-NMOS
input data
OD : Open Drain
Input/Output IOD port : IOD7 - IOD6
input data
output
data
OD-PMOS
or buffer
logic_4
60K
control
OD : Open Drain
Input/Output IOD port : IOD1 - IOD0
input data
output
data
OD-PMOS
or buffer
logic_4
60K
control
OD : Open Drain
Note: * Values are for VDD = 5.0V test conditions only.
6.6. Power Saving Mode
The SPC11A includes a power saving mode (Standby mode) for
those applications that require very low standby current. To enter
standby mode, the Wake-Up Register must be enabled and then
stop the CPU clock by writing the STOP CLOCK Register to enter
standby mode. In such mode, RAM and I/Os will remain in their
previous states until being awaken. Port IOD(7, 6, 1, 0) is the
only wake-up source in the SPC11A. After the SPC11A is
awaken, the internal CPU will go to the RESET State (Tw ≧
65536 x T1) and continue to execute program. Wakeup Reset
will not affect RAM nor I/Os (FIG.1).
© Sunplus Technology Co., Ltd.
5
Proprietary & Confidential
JUL. 09, 2001
Preliminary Version: 0.1
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