LC78602NE Ver la hoja de datos (PDF) - SANYO -> Panasonic
Número de pieza
componentes Descripción
fabricante
LC78602NE Datasheet PDF : 11 Pages
| |||
LC78602NE
Pin Functions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Pin
DEFI
3 V/*5 V
PDO
VVSS
ISET
VVDD
FR
VSS
EFMO
EFMIN
TMOD
CLV
HFL
TES
TOFF
TGL
JP
LASER
FSTA
EFBAL
SP8
VDD
FSEQ
24
PCK
25
SLOF
26
SLED+
27
SLED–
28
PUIN
29
DOUT
30
NC
31
*SEG8
32
*SEG7
33
*SEG6
34
*SEG5
35
*SEG4
36
*SEG3
37
*SEG2
38
*SEG1
39
VSS
40
NC
41
*DIG2
42
*DIG1
43
*PROG
44
*KEYI1
45
NC
46
NC
47
*RANDOM
48
RMTSL3
I/O
Function
Pin state during reset
I Defect detection signal (DEF) input. (Must be connected to 0 V if unused.)
—
I Supply voltage selection input. (High: 3V operation, low: 5V operation)
—
O
Internal VCO control phase comparator output
Undefined
—
Internal VCO ground. This pin must be connected to 0 V.
—
AI PLL circuit pins PDO output current adjustment resistor connection
—
—
Internal VCO power supply
—
AI
VCO frequency range adjustment
—
— Digital system ground. This pin must be connected to 0 V.
—
O Slice level
I control pins
EFM signal output
EFM signal input
Undefined
—
I Test input. This pin must be connected to 0 V.
—
O Disc motor control output. This is a 3-value output.
Hi-Z
I Track detection signal input. This is a Schmitt input.
—
I Tracking error signal input. This is a Schmitt input.
—
O Tracking off output
High output
O Tracking gain switching output. A low level output raises the gain.
Undefined
O Track jump control output. This is a 3-value output.
Hi-Z
O Laser control. A pull-down resistor is built in.
Pulled down
O FSTA control. A pull-down resistor is built in.
Pulled down
O EFBAL control. A pull-down resistor is built in.
Pulled down
O SP8 control. A pull-down resistor is built in.
Pulled down
— Digital system power supply
—
O Synchronizing signal detection output. Outputs a high level if the synchronizing signal detected
from the EFM signal and the internally generated synchronizing signal match.
Undefined
EFM data playback clock monitor. 4.3218 MHz when the phase is locked.
O (Note that this output is only provided in test mode. This pin outputs a low level during normal
mode operation.)
Low output
O Sled off control output
High output
O
Sled feed output
O
Low output
Low output
I Limit switch detection input. A pull-up resistor is built in.
—
O Digital output (EIAJ format)
Undefined
— Unused pin. This pin must be left open.
—
O Segment output (8). A pull-up resistor is built in.
Pulled up
O Segment output (7). A pull-up resistor is built in.
Pulled up
O Segment output (6). A pull-up resistor is built in.
Pulled up
O Segment output (5). A pull-up resistor is built in.
Pulled up
O Segment output (4). A pull-up resistor is built in.
Pulled up
O Segment output (3). A pull-up resistor is built in.
Pulled up
O Segment output (2). A pull-up resistor is built in.
Pulled up
O Segment output (1). A pull-up resistor is built in.
Pulled up
— Digital system ground. This pin must be connected to 0 V.
—
— Unused pin. This pin must be left open.
—
O Common driver output (2). A pull-up resistor is built in.
Pulled up
O Common driver output (1). A pull-up resistor is built in.
Pulled up
O Program operation monitor. A pull-up resistor is built in.
Pulled up
I Key matrix input (1). A pull-up resistor is built in.
—
— Unused pin. This pin must be left open.
—
— Unused pin. This pin must be left open.
—
O Random mode indicator output (Low: random mode, high: modes other than random mode.)
Hi-Z
Remote controller identifier input (3). This pin functions as an output pin set to the low level
during resets (when the *RES pin is low) and for a few milliseconds after the *RES pin
I/O switches to the high level. Therefore, applications that will set this pin high must connect an
external pull-up resistor to this pin.
Low output
Continued on next page.
No. 6021-6/11
Share Link: 