A6902D13TR Ver la hoja de datos (PDF) - STMicroelectronics

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A6902D13TR

Up to 1 A step down switching regulator with adjustable current limit for automotive applications

STMicroelectronics 

A6902D

Voltage monitors

5.2

Voltage monitors

An internal block continuously senses the VCC, VREF and VBG. If the voltages go higher than their thresholds,

the regulator begins operating. There is also an hysteresis on the VCC (UVLO).

Figure 3. Internal circuit

VCC

STARTER

PREREGULATOR

VREG

BANDGAP

IC BIAS

VREF

5.3

Oscillator

Figure below shows the block diagram of the oscillator circuit. The clock generator provides the switching

frequency of the device, which is internally fixed at 250 kHz. The frequency shifter block acts to reduce the

switching frequency in case of strong overcurrent or short circuit. The clock signal is then used in the internal logic

circuitry and is the input of the ramp generator.

The ramp generator circuit provides the sawtooth signal, used for PWM control and the internal voltage feed-

forward.

Figure 4. Oscillator circuit block diagram

FREQUENCY

SHIFTER

CLOCK

CLOCK

GENERATOR

RAMP

GENERATOR

RAMP

5.4

Current protection

The A6902D features different current protections:

• An inner current loop, composed by the transconductance current error amplifier and the sensing resistor,

that implements a precise switching current source regulating an adjustable real average current. This

operation regulates 100 mV across the sensing resistor and it requires a small signal stability analysis to

design the system bandwidth / phase margin (see Section 7 Closing the loop). The maximum bandwidth is

fSW / 5 = 50 kHz for a valid small analysis so the minimum time to react to an external load transient is about

five switching cycles.

• A second level “pulse by pulse” current protection, sensing the current flowing in the embedded power

element. This protection is faster than the previous as it can disable the power element with negligible delay

when the over current comparator is triggered during the power element conduction time. However, due to

the noise created by the switching activity of the power MOSFETs, the current sense is disabled during the

initial phase of the conduction time. This avoids an erroneous detection of a fault condition. This interval is

DS5503 - Rev 6

page 7/33

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