MT48LC16M16A2F4-7E Ver la hoja de datos (PDF) - Micron Technology

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componentes Descripción

fabricante

MT48LC16M16A2F4-7E

256Mb: x4, x8, x16 SDRAM

Micron Technology 

256Mb: x4, x8, x16 SDRAM

PRECHARGE Operation

Figure 45: Single READ Without Auto Precharge

T0

CLK

T1

tCK

tCKS tCKH

CKE

tCMS tCMH

Command

ACTIVE

NOP

DQM

tAS tAH

Address

Row

A10

BA0, BA1

tAS tAH

Row

tAS tAH

Bank

DQ

tRCD

tRAS

tRC

T2

T3

tCL

tCH

READ

NOP

tCMS tCMH

Column m

Disable auto precharge

Bank

tAC

tLZ

CL = 2

T4

T5

NOP

PRECHARGE

All banks

tOH

DOUT

tHZ

Single bank

Bank(s)

T6

NOP

tRP

T7

ACTIVE

Row

Row

Bank

T8

NOP

Don’t Care

Undefined

Note: 1. For this example, BL = 1, CL = 2, and the READ burst is followed by a manual PRE-

CHARGE.

PDF: 09005aef8091e6d1

256Mb_sdr.pdf - Rev. S 12/12 EN

73

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 1999 Micron Technology, Inc. All rights reserved.

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