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MC74HC161A Datasheet PDF : 16 Pages
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MC74HC161A,
MC74HC163A
Presettable Counters
High–Performance Silicon–Gate CMOS
The MC74HC161A and HC163A are identical in pinout to the
LS161 and LS163. The device inputs are compatible with standard
CMOS outputs; with pullup resistors, they are compatible with
LSTTL outputs.
The HC161A and HC163A are programmable 4–bit binary counters
with asynchronous and synchronous reset, respectively.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 192 FETs or 48 Equivalent Gates
ÎÎÎÎÎÎÎÎÎÎÎÎ Device
Count
Mode
Reset Mode
ÎÎÎÎÎÎÎÎÎÎÎÎ HC161A
Binary
Asynchronous
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ HC163A
Binary
Synchronous
LOGIC DIAGRAM
PRESET
DATA
INPUTS
P0 3
P1 4
P2 5
P3 6
CLOCK 2
14 Q0
13 Q1
12 Q2
11 Q3
BCD OR
BINARY
OUTPUT
15
RIPPLE
CARRY
OUT
16
1
16
1
http://onsemi.com
MARKING
DIAGRAMS
16
PDIP–16
N SUFFIX
CASE 648
MC74HC16xAN
AWLYYWW
1
16
SO–16
D SUFFIX
CASE 751B
HC16xA
AWLYWW
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package Shipping
MC74HC16xAN
PDIP–16 2000 / Box
MC74HC16xAD
SOIC–16 48 / Rail
MC74HC16xADR2
SOIC–16 2500 / Reel
PIN ASSIGNMENT
RESET 1
CLOCK 2
P0 3
P1 4
P2 5
P3 6
16 VCC
15
RIPPLE
CARRY OUT
14 Q0
13 Q1
12 Q2
11 Q3
COUNT
ENABLES
RESET 1
LOAD 9
ENABLE P 7
ENABLE T 10
PIN 16 = VCC
PIN 8 = GND
ENABLE P 7
GND 8
10 ENABLE T
9 LOAD
Clock
Reset*
L
H
H
H
H
FUNCTION TABLE
Inputs
Load Enable P Enable T
Output
Q
X
X
L
X
H
H
H
L
H
X
X
Reset
X
Load Preset Data
H
Count
X
No Count
L
No Count
*HC163A only. HC161A is an Asynchronous Reset Device
H = high level, L = low level, X = don’t care
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 8
Publication Order Number:
MC74HC161A/D
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