MAX5096/MAX5097
40V, 600mA Buck Converters with Low-
Quiescent-Current Linear Regulator Mode
PCB Layout Guidelines
1) Proper PCB layout is essential. Minimize ground noise
by connecting the anode of the freewheeling rectifier,
the input bypass capacitor ground lead, and the output
filter capacitor ground lead to a large PGND plane.
2) Minimize lead lengths to reduce stray capacitance,
trace resistance, and radiated noise. In particular,
place the Schottky/fast recovery rectifier diode right
next to the device.
3) Connect the exposed pad of the IC to the SGND
plane. Do not make a direct connection between the
exposed pad plane and SGND (pin 2) under the IC.
Connect the exposed pad and pin 2 to the SGND
plane separately. Connect the ground connection of
the feedback resistive divider, the soft-start capacitor,
the adjustable reset timeout capacitor, and the com-
pensation network to the SGND plane. Connect the
SGND plane and PGND plane at one point near the
input bypass capacitor at VIN.
4) Use the large SGND plane as a heatsink for the
MAX5096/MAX5097. Use large PGND and LX planes
as heatsinks for the rectifier diode and the inductor.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
16 TQFN
20 TSSOP
PACKAGE
CODE
T1655+2
U20E+4
OUTLINE
NO.
21-0140
21-0108
LAND
PATTERN NO.
90-0072
90-0115
Selector Guide
PART
MAX5096A_ _ _
MAX5096B_ _ _
MAX5097A_ _ _
MAX5097B_ _ _
OUTPUT
VOLTAGE
(V)
+3.3/Adjustable
+5.0/Adjustable
+3.3/Adjustable
+5.0/Adjustable
SWITCHING
FREQUENCY
(kHz)
135
135
330
330
www.maximintegrated.com
Maxim Integrated │ 17