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MAX1927REUB

Low-Output-Voltage, 800mA, PWM Step-Down DC-DC Converters

Maxim Integrated 

Low-Output-Voltage, 800mA, PWM Step-Down

DC-DC Converters

LX

MAX1927R

FB

R1

R2

50kΩ

Figure 2. Setting the Adjustable Output Voltage

Applications Information

Output Voltage Selection

The MAX1927/MAX1928 have preset output voltages.

In addition, the MAX1927R has an adjustable output.

To set the output voltage at the preset voltage, connect

FB to the output. See Table 1 for a list of the preset volt-

ages and their corresponding part numbers.

The output voltage for the MAX1927R is adjustable

from 0.75V to the input voltage by connecting FB to a

resistor-divider between the output and GND (Figure

2). To determine the values of the resistor-divider, first

select a value for feedback resistor R2 between 5kΩ to

50kΩ. R1 is then given by:



R1= R2 × 

VOUT

VFB



− 1

where VFB is 0.75V.

Input Capacitor Selection

Capacitor equivalent series resistance (ESR) is a major

contributor to input ripple in high-frequency DC-DC

converters. Ordinary aluminum-electrolytic capacitors

have high ESR and should be avoided. Low-ESR alu-

minum electrolytic capacitors are acceptable and rela-

tively inexpensive. Low-ESR tantalum capacitors or

polymer capacitors are better and provide a compact

solution for space-constrained surface-mount designs.

Ceramic capacitors have the lowest ESR overall.

The input filter capacitor reduces peak currents and

noise at the input voltage source. Connect a low-ESR

bulk capacitor (≥10µF typ) to the input. Select this bulk

capacitor to meet the input ripple requirements and

voltage rating rather than capacitance value. Use the

Table 1. FB Regulation Voltages

PART

MAX1927R

MAX1928-15

MAX1928-18

MAX1928-25

PRESET OUTPUT VOLTAGE

0.75V, Adjustable

1.5 V

1.8 V

2.5 V

following equation to calculate the maximum RMS input

current:

( ) IRMS

=

IOUT

VIN

×

VOUT × VIN − VOUT

Compensation, Stability, and

Output Capacitor

The MAX1927/MAX1928 are externally compensated

with a resistor and a capacitor (see Figure 3, RC and

CC) in series from COMP to GND. An additional capaci-

tor (Cf) may be required from COMP to GND if high-

ESR output capacitors are used. The capacitor inte-

grates the current from the transimpedance amplifier,

averaging output capacitor ripple. This sets the device

speed for transient response and allows the use of

small ceramic output capacitors because the phase-

shifted capacitor ripple does not disturb the current

regulation loop. The resistor sets the proportional gain

of the output error voltage by a factor gm ✕ RC.

Increasing this resistor also increases the sensitivity of

the control loop to output ripple.

The resistor and capacitor set a compensation zero

that defines the system’s transient response. The load

creates a dynamic pole, shifting in frequency with

changes in load. As the load decreases, the pole fre-

quency decreases. System stability requires that the

compensation zero must be placed to ensure adequate

phase margin (at least 30° at unity gain). The following

is a design procedure for the compensation network:

1) Select an appropriate converter bandwidth (fC) to

stabilize the system while maximizing transient

response. This bandwidth should not exceed 1/10

of the switching frequency.

2) Calculate the compensation capacitor, CC, based

on this bandwidth:

For the MAX1927:

CC

=







VOUT

IOUT(MAX)







×





1

RCS





×





gm

×

R2

R1+ R2





×





1

2πfC





_______________________________________________________________________________________ 9

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