GLT41016 Ver la hoja de datos (PDF) - G-Link Technology
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GLT41016 Datasheet PDF : 23 Pages
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G -LINK
GLT41016
64K X 16 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
May 1997 (Rev 1)
Read: Word
L
Read: Lower Byte
L
Read: Upper Byte
L
Write: Word(Early Write)
L
L
L
H
L ROW/COL Data Out
L
H
H
L ROW/COL Lower Byte,Data-Out
Upper Byte,High-Z
H
L
H
L ROW/COL Lower Byte,High-Z
Upper Byte,Data-Out
L
L
L
X ROW/COL Data-In
Write: Lower Byte (Early) L
L
H
L
X ROW/COL Lower Byte,Data-In
Upper Byte,High-Z
Write: Upper Byte (Early) L
H
L
L
X ROW/COL Lower Byte,High-Z
Read Write
Upper Byte,Data-In
L
L
o o L H L L H ROW/COL Data-Out,Data-In
1,2
EDO-Page- 1st Cycle
L HoL HoL H
L ROW/COL Data-Out
1
Mode Read 2nd Cycle
L
HoL HoL H
L
COL Data-Out
1
EDO-Page- 1st Cycle
L HoL HoL L
X ROW/COL Data-In
2
Mode Write 2nd Cycle
L
HoL HoL L
X
COL Data-In
2
EDO-Page- 1st Cycle
L
o o o o H L H L H L L H ROW/COL Data-Out,Data-In
1,2
Mode Read-
Write
2nd Cycle
L
HoL HoL HoL LoH
COL Data-Out,Data-In
1,2
Hidden
Read
LoHoL L
L
H
L ROW/COL Data-Out
1
Refresh
Write
LoHoL L
L
L
X ROW/COL Data-In
2,3
RAS -Only Refresh
L
H
H
X
X
ROW High-Z
CBR Refresh
HoL L
L
X
X
High-Z
4
Notes:
1. These READ cycles may also be BYTE READ cycles (either UCAS or LCAS active).
2. These WRITE cycles may also be BYTE READ cycles (either UCAS or LCAS active).
3. EARLY WRITE only.
4. At least one of the two CAS signals must be active ( UCAS or LCAS ).
DC and Operating Characteristics (1-2)
q q r TA = 0 C to 70 C, VCC=5V 10%, VSS=0V, unless otherwise specified.
G-Link Technology Corporation
2701Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
-5-
G-Link Technology Corporation, Taiwan
2F, No.12, R&D Rd. II, Science-Based Industrial Park,
Hsin Chu, Taiwan, R.O.C.
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