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74AHC139

Dual 2-to-4 line decoder/demultiplexer

NXP Semiconductors. 

NXP Semiconductors

5. Pinning information

5.1 Pinning

74AHC139; 74AHCT139

Dual 2-to-4 line decoder/demultiplexer

Fig 4. Pin configuration

1E 1

1A0 2

1A1 3

1Y0 4

1Y1 5

1Y2 6

1Y3 7

GND 8

16 VCC

15 2E

14 2A0

13 2A1

139

12 2Y0

11 2Y1

10 2Y2

9 2Y3

001aad029

5.2 Pin description

Table 2.

Symbol

1E

1A0

1A1

1Y0

1Y1

1Y2

1Y3

GND

2Y3

2Y2

2Y1

2Y0

2A1

2A0

2E

VCC

Pin description

Pin

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

Description

enable input (active LOW)

address input

address input

output

output

output

output

ground (0 V)

output

output

output

output

address input

address input

enable input (active LOW)

supply voltage

74AHC_AHCT139_2

Product data sheet

Rev. 02 — 9 May 2008

© NXP B.V. 2008. All rights reserved.

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