Pin No.
1
2, 29, 38
3
4, 28, 44
5
6
7
8
9
10–23
24
25
26
27
30
31
32
33
34
35
36
37
39
40, 43
41
42
REV. B
PIN CONFIGURATION
AD9260
44 43 42 41 40 39 38 37 36 35 34
DVSS 1
AVSS 2
DVDD 3
AVDD 4
DRVSS 5
DRVDD 6
CLK 7
READ 8
(LSB) BIT16 9
BIT15 10
BIT14 11
PIN 1
IDENTIFIER
AD9260
TOP VIEW
(Not to Scale)
33 REFCOM
32 VREF
31 SENSE
30 RESET
29 AVSS
28 AVDD
27 CS
26 DAV
25 OTR
24 BIT1 (MSB)
23 BIT2
12 13 14 15 16 17 18 19 20 21 22
NC = NO CONNECT
PIN FUNCTION DESCRIPTIONS
Name
DVSS
AVSS
DVDD
AVDD
DRVSS
DRVDD
CLK
READ
BIT16
BIT15–BIT2
BIT1
OTR
DAV
CS
RESET
SENSE
VREF
REFCOM
MODE
BIAS
CAPB
CAPT
CML
NC
VINA
VINB
Description
Digital Ground.
Analog Ground.
+3 V to +5 V Digital Supply.
+5 V Analog Supply.
Digital Output Driver Ground.
+3 V to +5 V Digital Output Driver Supply.
Clock Input.
Part of DSP Interface—Pull Low to Disable Output Bits.
Least Significant Data Bit (LSB).
Data Output Bit.
Most Significant Data Bit (MSB).
Out of Range—Set When Converter or Filter Overflows.
Data Available.
Chip Select (CS): Active LOW.
RESET: Active LOW.
Reference Amplifier SENSE: Selects REF Level.
Input Span Select Reference I/O.
Reference Common.
Mode Select—Selects Decimation Mode.
Power Bias.
Noise Reduction Pin—Decouples Reference Level.
Noise Reduction Pin—Decouples Reference Level.
Common-Mode Level (AVDD/2.5).
No Connect (Ground for Shielding Purposes).
Analog Input Pin (+).
Analog Input Pin (–).
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