FX613P Ver la hoja de datos (PDF) - CML Microsystems Plc

Número de pieza

componentes Descripción

fabricante

FX613P

Universal Call Progress Decoder

CML Microsystems Plc 

Application Information

R2

1

X1

C5

2

C6 VSS

C4

VSS

XTAL/CLOCK

XTAL

VBIAS

C2

LEVEL IN

AUDIO SIGNAL

C1

SIGNAL IN

C3

VSS

VDD

1

16

2

15

3

14

4

13

FX613DW

5

12

6

11

7

10

8

9

VDD

R1

DATA OUT

CHIP SELECT

SERIAL CLOCK INPUT

IRQ

VSS

Notes

(1) The Xtal/Clock input may be driven from the host telephone

system's 3.579545MHz clock; if a Xtal drive is required, the

configuration shown INSET is recommended.

(2) The audio signal should be input to both Signal In and Level In pins

via separate coupling capacitors. If it is wished to operate the

device with disregard to on-chip level thresholds and permanently

enable the FX613, the Level In pin should be held at VDD.

To disable the FX613 the Level In pin should be held at VSS. Level

thresholds are preset internally.

Fig.2 External Component Connections

Component

Value

R1

22.0kΩ

R2

1.0MΩ

C1

0.01µF

C2

0.1µF

C3

1.0µF

C4

1.0µF

C5

33.0pF

C6

33.0pF

X1

3.579545MHz

Tolerances: C = ± 20% R = ± 10%

VDD

0 775mVrms

-10

-20

Must

-30 Decode

-40

Must-Not

-50 Decode

Low Band

(LO)

High Band

(HI)

0

200

400

600

800

1000 1200 1400 1600 1800 2000 2200

Frequency (Hz)

Fig.3 HI/LO Decode Bands

3

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