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TMXF281553BAL-2-DB Ver la hoja de datos (PDF) - Agere -> LSI Corporation

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fabricante
TMXF281553BAL-2-DB
Agere
Agere -> LSI Corporation 
TMXF281553BAL-2-DB Datasheet PDF : 606 Pages
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Preliminary Data Sheet
May 2001
TMXF28155 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
2 Preface (continued)
2.3 Overview
The SONET/SDH Super Mapper device integrates the SONET/SDH line, path, and tributary termination functions
with M13 multiplex functions and the primary rate framing function. It is designed to drive an OC-3/STM-1 optical
signal directly or to allow for modular growth in terminal or add/drop applications.
It provides a versatile interface for all STS-3/STM-1 and STS-1 termination applications in point-to-point scenarios
and for ring applications. This chip can be used in tributary shelf applications for up to 28 T1 or J1 or 21 E1 line
cards providing all possible mappings into SONET/SDH. Because of the flexibility of the mappings, software
upgrades from M13 mapped connections to VT/TU mapped connections are possible. This device can also be
used for DS3/DS2 applications.
A single Super Mapper is capable of processing the aggregate bandwidth of one STS-1 or DS3. By communicating
to two other mate devices via the telecom bus interface, the Super Mapper is capable of terminating a full
STS-3/STM-1 signal.
TCB AND TDL
RPOAC TPOAC TELECOM BUS
DS3
DS2AISCLK RCB AND RDL
SYSTEM INTERFACE
BUS
SYS
CLK
SYNC
OVERHEAD
TERMINATION
STS-1/
AU-3
STS-3
STM-1
MSP
1+1
TMUX
MAPPING &
MULTIPLEXING
M13
MUX
SPE/
AU-3
MAPPER
VT/VC
MAPPER
T1/E1/J1
FRAMING
FRAMER
BANK
T1/E1
DS2
DS3
CROSS
CONNECT
LINERX
LINETX
RTOAC TTOAC
MPU INTERFACE
AND CONTROL
TEST
PATTERN
GEN/MON
DIGITAL
JITTER
ATTENUATOR
MPU INTERFACE
LOPOHIN LOPOHOUT
MISC
Figure 1. Functional Diagram of Super Mapper
DS0/E0
(XN)
DS1 (X29)
/E1 (X22)
DS2 (X7)
DS1/E1
(NSMI MODE)
DS3/STS1
(NSMI MODE)
DS1XCLK
E1XCLK
5-8923(F)
Agere Systems Inc.
7

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