ADSP-21062CS-160(RevH) Ver la hoja de datos (PDF) - Analog Devices

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fabricante

ADSP-21062CS-160
(Rev.:RevH)

SHARC Processor

Analog Devices 

ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC

Interrupts

Table 11. Interrupts

Parameter

Timing Requirements

tSIR

IRQ2–0 Setup Before CLKIN High1

tHIR

IRQ2–0 Hold Before CLKIN High1

tIPW

IRQ2–0 Pulse Width2

1 Only required for IRQx recognition in the following cycle.

2 Applies only if tSIR and tHIR requirements are not met.

5 V and 3.3 V

Min

Max

Unit

18 + 3DT/4

ns

12 + 3DT/4

ns

2 + tCK

ns

CLKIN

IRQ2–0

Timer

Table 12. Timer

Parameter

Switching Characteristic

tDTEX

CLKIN High to TIMEXP

CLKIN

TIMEXP

tDTEX

tSIR

tHIR

tIPW

Figure 11. Interrupts

5 V and 3.3 V

Min

Max

15

Figure 12. Timer

tDTEX

Unit

ns

Rev. H | Page 23 of 64 | March 2013

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