MITSUBISHI MICROCOMPUTERS
38C3 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Table 5 List of I/O port function (2)
Pin
Name
Input/Output
I/O format
Non-port function
Related SFRs
Ref. No.
P40/SCLK2
Port P4
Input/Output, CMOS compatible input Serial I/O function I/O Serial I/O control registers (3)
individual bits level
1, 2
CMOS 3-state output
PULL register B
P41/T1OUT
Timer output
Timer 12 mode register
(4)
PULL register B
P42/T3OUT
Timer output
Timer 34 mode register
(4)
PULL register B
P43/φ
φ clock output
φ output control register
(5)
PULL register B
P44/SIN
P45/SOUT
P46/SCLK1
P47/SRDY
Serial I/O function I/O Serial I/O control registers (6)
1, 2
(7)
PULL register B
(8)
(9)
P50/TAOUT Port P5
Input/Output,
individual bits
CMOS compatible input Timer A output
level
CMOS 3-state output
Timer A mode register
(10)
Timer A control reigster
PULL register B
P51
Input
CMOS compatible input
(11)
level
P52/PWM1
Input/Output,
individual bits
CMOS compatible input PWM output
level
CMOS 3-state output
Timer 56 mode register
(4)
PULL register B
P53/CNTR0
P54/CNTR1
External count I/O
Interrupt edge selection reg- (12)
ister
PULL register B
P55/INT0
P56/INT1
P57/INT2
External interrupt in- Interrupt edge selection reg- (12)
put
ister
PULL register B
P60/AN0
Port P6
Input/Output, CMOS compatible input A-D converter input A-D control register
(13)
–
individual bits level
PULL register B
P67/AN7
CMOS 3-state output
P70/XCIN
Port P7
Input/Output, CMOS compatible input Sub-clock generating CPU mode register
(14)
individual bits level
circuit I/O
PULL register A
P71/XCOUT
CMOS 3-state output
(15)
P80 – P87
Port P8
Input/Output, CMOS compatible input Key input (key-on Interrupt control register 2 (17)
individual bits level
wake-up) interrupt in- PULL register A
CMOS 3-state output
put
COM0 – COM3 Common
Output
LCD common output
LCD mode register
(16)
Notes 1: Make sure that the input level at each pin is either 0 V or VCC during execution of the STP instruction.
When an input level is at an intermediate potential, a current will flow from VCC to VSS through the input-stage gate.
2: For details of the functions of ports P0 to P3 in modes other than single-chip mode, and how to use double function ports as function I/O ports, refer to the
applicable sections.
11