AD668
Parameter
AD668J/A
AD668K
AD668S
Min Typ Max Min Typ Max Min Typ Max Units
AC CHARACTERISTICS
Analog Settling Time
(10% to 120% Step)
to ± 1%
60
*
to ± 0.1%
90
*
to ± 0.025%
120
*
Digital Settling Time
Current
to ± 1%
30
*
to ± 0.025%
90
*
Voltage (100 Ω Internal RL)3
to 1%
50
*
to 0.1%
75
*
to 0.025%
110
*
Glitch Impulse4
350
*
Peak Amplitude
20
*
Total Harmonic Distortion5
–75
*
Multiplying Feedthrough Error6
–62
*
FULL-SCALE TRANSITION2
10% to 90% Rise Time
11
*
90% to 10% Fall Time
11
*
*
ns to 1% of FSR
*
ns to 0.1% of FSR
*
ns to 0.025% of FSR
*
ns to 1% of FSR
*
ns to 0.025% of FSR
*
ns to 1% of FSR
*
ns to 0.1% of FSR
*
ns to 0.025% of FSR
*
pV-sec
*
% of FSR
*
dB
*
dB
*
ns
*
ns
POWER REQUIREMENTS
+10.8 V to +16.5 V
27 32
*
–10.8 V to –16.5 V
79
*
Power Dissipation
510 615
*
PSRR7
0.05
*
*
mA
*
–mA
*
mW
*
% of FSR/V
TEMPERATURE RANGE
Rated Specification2 (J, K, S)
0
Rated Specification (A)
–40
Storage
–65
+70 *
+85
+150 *
NOTES
*Same as AD668J/A.
1Measured in IOUT mode. Specified at nominal 5 V full-scale reference.
2Measured in VOUT mode, unless otherwise specified. Specified at nominal 5 V
full-scale reference.
3Total resistance. Refer to Figure 4.
4At the major carry, driven by HCMOS logic.
*
–55
*
*
+125 °C
°C
*
°C
5VOUT = 1 V p-p, VIN = 10% to 110%, 100 kHz. Digital Input All 1s.
6VIN = 200 mV p-p, 1 MHz Sine Wave. Digital Input all 0s. See Figure 20.
7Measured at 15 V ± 10% and 12 V ± 10%.
Specifications shown in boldface are tested on all producfion units at final elec-
trical test.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
VCC to REFCOM . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +18 V
VEE to REFCOM . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to –18 V
REFCOM to LCOM . . . . . . . . . . . . . . . . . . +100 mV to –10 V
ACOM to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mV
THCOM to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . ± 500 mV
REFCOM to REFIN (1, 2) . . . . . . . . . . . . . . . . . . . . . . . . 18 V
IBPO to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .± 5 V
IOUT to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . –5 V to VTH
Digital Inputs to THCOM . . . . . . . . . . . . –500 mV to +7.0 V
REFIN1 to REFIN2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V
VTH to THCOM . . . . . . . . . . . . . . . . . . . . . . –0.7 V to +1.4 V
Logic Threshold Control Input Current . . . . . . . . . . . . . 5 mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 670 mW
Storage Temperature Range
Q (Cerdip) Package . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +175°C
Thermal Resistance
θ JA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +75°C/W
θ JC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +25°C/W
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
REV. A
–3–