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TS9410VA_ Datasheet - Vishay Semiconductors

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Part Name
TS9410VA_

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11 Pages

File Size
2.5 MB

MFG CO.
VISHAYSEMICONDUCTOR
Vishay Semiconductors 

Introduction
Benefits of using bare die
• High design flexibility without package limitations
• High level of integration
• Temperature management with chip-on-board (COB) technology
• Highly accurate die placement
• Reduced system cost
• Customer specific design
• Possible process flow modification

Vishay service
• Design assistance
• Assembly assistance
• Die handling assistance

Wafer processing duty
• Wafer mapping/wafer inking
• Wafer thinning
• Wafer dicing
• Die sorting
• Visual inspection

Packaging and shipping methods
• Unsawn wafer: the wafers are delivered in a sealed bag and die are not singulated
• Sawn wafer on loose foil: the wafers are sawn and supplied on blue tape
• Sawn wafer on discoframe: the wafers are sawn and supplied on a blue tape in a plastic frame


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