General Description
   The SY89221U is a 2.5/3.3V precision, high-speed, integrated clock divider and LVPECL fanout buffer capable of handling clocks up to 1.5GHz. Optimized for communications applications, the four independently controlled output banks are phase-matched and can be configured for pass through ÷1, ÷2 or ÷4 divider ratios.

FEATUREs
• Four low-skew LVPECL output banks with
   independently programmable ÷1, ÷2 and ÷4 divider
   options
• Four output banks, 15 total outputs
• Guaranteed AC performance over temperature and
   voltage:
   – Accepts a clock frequency up to 1.5GHz
   – <1600ps IN-to-OUT propagation delay
   – <270ps rise/fall time
   – <35 ps within-bank skew
• Fail Safe Input
   – Prevents outputs from oscillating
• Ultra-low jitter design:
   – <1psRMS random jitter
   – <10psPP total jitter (clock)
• Patent-pending input termination and VT pin
   accepts DC- and AC-coupled inputs (CML, PECL,
   LVDS)
• CMOS/TTL-compatible output enable (EN) and
   divider select control
• 2.5V ±5% or 3.3V ±10% power supply
• –40°C to +85°C temperature range
• Available in 64-pin TQFP

APPLICATIONs
• All SONET/SDH applications
• All Fibre Channel applications
• All Gigabit Ethernet applications