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MX29F800CTXEI-70G Datasheet - Integrated Device Technology

MX29F800CB image

Part Name
MX29F800CTXEI-70G

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48 Pages

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696.3 kB

MFG CO.
IDT
Integrated Device Technology 

FEATURES
GENERAL FEATURES
•  Single Power Supply Operation
  - 4.5 to 5.5 volt for read, erase, and program operations
•  1,048,576 x 8 / 524,288 x 16 switchable
•  Boot Sector Architecture
  - T = Top Boot Sector
  - B = Bottom Boot Sector
•  Sector Structure
  - 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x 1, and 64K-Byte x 15
•  Sector protection
  - Hardware method to disable any combination of sectors from program or erase operations
  - Temporary sector unprotected allows code changes in previously locked sectors
•  Latch-up protected to 100mA from -1V to Vcc + 1V
•  Compatible with JEDEC standard
  - Pinout and software compatible to single power supply Flash

PERFORMANCE
•  High Performance
  - Access time: 70ns
  - Byte/Word program time: 9us/11us (typical)
  - Erase time: 0.7s/sector, 8s/chip (typical)
•  Low Power Consumption
  - Low active read current: 40mA (maximum) at 5MHz
  - Low standby current: 1uA (typical)
•  Minimum 100,000 erase/program cycle
•  20 years data retention

SOFTWARE FEATURES
•  Erase Suspend/ Erase Resume
  - Suspends sector erase operation to read data from or program data to another sector which is not being erased
•  Status Reply
  - Data# Polling & Toggle bits provide detection of program and erase operation completion

HARDWARE FEATURES
•  Ready/Busy# (RY/BY#) Output
  - Provides a hardware method of detecting program and erase operation completion
•  Hardware Reset (RESET#) Input
  - Provides a hardware method to reset the internal state machine to read mode

PACKAGE
•  44-Pin SOP
•  48-Pin TSOP
•  48-Ball LFBGA (6x8mm)
•  All devices are RoHS Compliant
•  All non RoHS Compliant devices are not recommeded for new design in

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