Features
• 8-Bit HCS08 Central Processor Unit (CPU)
   – Up to 50.33 MHz HCS08 CPU at 3.6 V to 2.4 V, 40 MHz CPU
      at 2.4 V to 2.1 V and 20 MHz CPU at 2.1 V to 1.8 V across
      temperature range of –40 °C to 85 °C
   – HC08 instruction set with added BGND instruction
   – Support for up to 32 interrupt/reset sources
• On-Chip Memory
   – Flash read/program/erase over full operating voltage and
      temperature
   – Random-access memory (RAM)
   – Security circuitry to prevent unauthorized access to RAM and
      flash contents
• Power-Saving Modes
   – Two very low power stop modes
   – Reduced power wait mode
   – Peripheral clock enable register can disable clocks to unused
      modules, thereby reducing currents; allows clocks to remain
      enabled to specific peripherals in stop3 mode.
   – Very low power external oscillator that can be used in run,
      wait, and stop modes to provide accurate clock source to real
      time counter.
   – 6 μs typical wakeup time from stop3 mode
• Clock Source Options
   – Oscillator (XOSCVLP) — Loop-control Pierce oscillator;
      crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz or
      1 MHz to 16 MHz
   – Internal clock source (ICS) — Internal clock source module
      containing a frequency-locked-loop (FLL) controlled by
      internal or external reference; precision trimming of internal
      reference allows 0.2% resolution and 2% deviation over
      temperature and voltage; supports CPU frequencies from
      4 kHz to 50.33 MHz.
• System Protection
   – Watchdog computer operating properly (COP) reset with
      option to run from dedicated 1 kHz internal clock source or bus
      clock.
   – Low-voltage warning with interrupt.
   – Low-voltage detection with reset or interrupt
   – Selectable trip points.
   – Illegal opcode detection with reset
   – Illegal address detection with reset
   – Flash block protection
• Development Support
   – Single-wire background debug interface
   – Breakpoint capability to allow single breakpoint setting during
      in-circuit debugging (plus three breakpoints in on-chip debug
      module)
   – On-chip in-circuit emulator (ICE) debug module containing
      three comparators and nine trigger modes. Eight deep FIFO for
      storing change-of-flow addresses and event-only data. Debug
      module supports both tag and force breakpoints
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