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MC68MH360AI25L
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MC68MH360AI25L Datasheet - Freescale Semiconductor
Freescale Semiconductor
Introduction
Ideal for E1/T1 applications, the QMC protocol can multiplex any 64-channel combination of subgroups to one TDM interface.
Each of the channels can be separately programmed either to perform HDLC formatting/deformatting or to act as a transparent channel.
Both of the SI serial interfaces (for example, TDMa or TDMb) can be dedicated to the QMC protocol. The SI transfers the whole frame to an SCC4. Using the CPM RISC, the SCC works transparently, not participating in any QMC protocol functions. The SCC only performs the parallel-to-serial conversion and adds elasticity through its FIFO memory. The CPM, with its special enhanced microcode and additional dedicated hardware for framing and masking support, does all of the protocol processing for each of the 64 channels. Note that it is executed without intervention from the on-board CPU. Figure 1-1 illustrates the QMC’s multichannel capability. Note that each SCC can support up to 64 channels from the TDM; however, there are limitations depending on the device used. This is summarized in Section 1.3, “QMC Features.”
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