DESCRIPTION
The M54HC4020 is an high speed CMOS 14 STAGE BINARY COUNTER fabricated with silicon gate C2MOS technology.
A clear input is used to reset the counter to the all low level state. A high level on CLEAR accomplishes the reset function. A negative transition on the CLOCK input increments the counter by one.
For M54HC4020 twelve kind of divided output are provided; 1st and 4th stage to 14th stage.
The maximum division available at last stage is 1/16384 x fIN at clock.
All inputs are equipped with protection circuits against static discharge and transient excess voltage.

■ HIGH SPEED: fMAX = 70 MHz (TYP.) at VCC = 6V
■ LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C
■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)
■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V
■ PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 4020
■ SPACE GRADE-1: ESA SCC QUALIFIED
■ 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST
■ NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION
■ DEVICE FULLY COMPLIANT WITH SCC-9204-070