IS61LF25636T(2002) Datasheet - Integrated Silicon Solution
MFG CO.

Integrated Silicon Solution
DESCRIPTION
The ISSI IS61SF25632, IS61SF25636, IS61SF51218, IS61LF25632, IS61LF25636, and IS61LF51218 are high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, secondary cache for the Pentium™, 680X0™, and PowerPC™ microprocessors.
FEATURES
• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data and control
• Pentium™ or linear burst sequence control using MODE input
• Three chip enable option for simple depth expansion and address pipelining
• Common data inputs and data outputs
• JEDEC 100-Pin TQFP and 119-pin PBGA package
• Single +3.3V, +10%, –5% power supply
• Power-down snooze mode
• 3.3V I/O for SF
• 2.5V I/O for LF
• Snooze MODE for reduced-power standby
• T version (three chip selects)
• D version (two chip selects)
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Description
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