Overview
   CH424 is a 4K byte FIFO memory chip. CH424 has two 8-bit passive parallel ports, input W and output R. CH424 is connected to the system bus of microcontroller/DSP/MCU/MPU and other controllers through 8-bit data lines and read, write, chip select and other control lines. It is suitable for connecting microcontrollers with microcontrollers, microcontrollers with DSP/MCU, etc. The following figure is its general application block diagram.

FEATUREs
● 4K x 8-bit FIFO.
● 8-bit parallel interface:
   W end/entry: 8-bit bidirectional three-state data bus (WD7~WD0), chip select (W_CS), write (W_WR), read (W_RD);
   R end/exit: 8-bit three-state data bus (RD7~RD0), chip select (R_CS), read (R_RD), address (R_A0).
● The number of bytes of the used and remaining space of the FIFO can be queried at any time, which is convenient for block reading and writing.
● Provide FIFO full status line FULL and FIFO empty status line EMPT, low level is effective.
● Support 5V power supply voltage, 3.3V power supply voltage and 3V power supply voltage.
● Use QFP-44 lead-free package, compatible with RoHS.