Functional description
The AS7C1025A and AS7C31025A are high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices organized as 131,072 x 8 bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.

FEATUREs
• AS7C1025A (5V version)
• AS7C31025A (3.3V version)
• Industrial and commercial temperatures
• Organization: 131,072 x 8 bits
• High speed
    - 10/10/12/15/20 ns address access time
    - 3/3/4/5 ns output enable access time
• Low power consumption: ACTIVE
    - 660 mW (AS7C1025A) / max @ 10 ns (5V)
    - 324 mW (AS7C31025A) / max @ 10 ns (3.3V)
• Low power consumption: STANDBY
    - 55 mW (AS7C1025A) / max CMOS (5V)
    - 36 mW (AS7C31025A) / max CMOS (3.3V)
• Latest 6T 0.25u CMOS technology
• 2.0V data retention
• Easy memory expansion with CE, OE inputs
• Center power and ground
• TTL/LVTTL-compatible, three-state I/O
• JEDEC-standard packages
    - 32-pin, 300 mil SOJ
    - 32-pin, 400 mil SOJ
    - 32-pin, TSOP II
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA