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74VHCT126BQ-Q100(2013) Datasheet - Nexperia B.V. All rights reserved

74VHC126-Q100 image

Part Name
74VHCT126BQ-Q100

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16 Pages

File Size
641.8 kB

MFG CO.
NEXPERIA
Nexperia B.V. All rights reserved 

General description
   The 74VHC126-Q100; 74VHCT126-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A.

Features and benefits
• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
   ✦ Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Balanced propagation delays
• All inputs have Schmitt-trigger action
• Inputs accept voltages higher than VCC
• Input levels:
   ✦ The 74VHC126-Q100 operates with CMOS input level
   ✦ The 74VHCT126-Q100 operates with TTL input level
• ESD protection:
   ✦ MIL-STD-883, method 3015 exceeds 2000 V
   ✦ HBM JESD22-A114F exceeds 2000 V
   ✦ MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)
• Multiple package options


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