datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site
HOME  >>>  Toshiba  >>> 74VHC132FT PDF

74VHC132FT Datasheet - Toshiba

74VHC132FT image

Part Name
74VHC132FT

Other PDF
  no available.

PDF
DOWNLOAD     

page
8 Pages

File Size
156.7 kB

MFG CO.
Toshiba
Toshiba 

Functional Description
• Quad 2-Input Schmitt NAND Gate

General
   The 74VHC132FT is an advanced high speed CMOS 2-INPUT SCHMITT NAND GATE fabricated with silicon gate C2MOS technology.
   It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.
   Pin configuration and function are the same as the 74VHC00FT but the inputs have hysteresis and with its schmitt trigger function, the 74VHC132FT can be used as a line receivers which will receive slow input signals.
   An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 to 3 V systems and two supply systems such as battery back up.
   This circuit prevents device destruction due to mismatched supply and input voltages.


FEATUREs
(1) AEC-Q100 (Rev. H) (Note 1)
(2) Wide operating temperature range: Topr = -40 to 125 
(3) High speed: tpd = 4.9 ns (typ.) at VCC = 5 V
(4) Low power dissipation: ICC = 2.0 µA (max) at Ta = 25 
(5) Power down protection is provided on all inputs.
(6) Balanced propagation delays: tPLH ≈ tPHL
(7) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V
(8) Low noise: VOLP = 0.8 V (max)
(9) Pin and function compatible with 74ALS132


Share Link: GO URL

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]