
NXP Semiconductors.
General description
The 74LVC374A is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock input (CP) and an outputs enable input (OE) are common to all flip-flops.
The eight flip-flops will store the state of their individual D-inputs that meet the set-up and
hold times requirements on the LOW-to-HIGH CP transition.
When pin OE is LOW, the contents of the eight flip-flops is available at the outputs. When pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications.
The 74LVC374A is functionally identical to the 74LVC574A, but has a different pin arrangement.
FEATUREs and benefits
■ 5 V tolerant inputs/outputs; for interfacing with 5 V logic
■ Wide supply voltage range from 1.2 V to 3.6 V
■ CMOS low power consumption
■ Direct interface with TTL levels
■ High-impedance when VCC = 0 V
■ 8-bit positive edge-triggered register
■ Independent register and 3-state buffer operation
■ Complies with JEDEC standard:
♦ JESD8-7A (1.65 V to 1.95 V)
♦ JESD8-5A (2.3 V to 2.7 V)
♦ JESD8-C/JESD36 (2.7 V to 3.6 V)
■ ESD protection:
♦ HBM JESD22-A114F exceeds 2000 V
♦ MM JESD22-A115-B exceeds 200 V
♦ CDM JESD22-C101E exceeds 1000 V
■ Specified from -40°C to +85°C and -40°C to +125°C