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74LVC132A Datasheet - Nexperia B.V. All rights reserved

74LVC132A image

Part Name
74LVC132A

Other PDF
  2020  

PDF
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page
14 Pages

File Size
245 kB

MFG CO.
NEXPERIA
Nexperia B.V. All rights reserved 

General description
   The 74LVC132A provides four 2-input NAND gates with Schmitt trigger inputs. It is capable of transforming slowly-changing input signals into sharply defined, jitter-free output signals.
   The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.
   Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environment.

Features and benefits
• Wide supply voltage range from 1.2 V to 3.6 V
• 5 V tolerant inputs for interfacing with 5 V logic
• CMOS low-power consumption
• Direct interface with TTL levels
• Unlimited input rise and fall times
• Inputs accept voltages up to 5.5 V
• Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V)
• ESD protection:
   • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
   • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
• Specified from -40 °C to +85 °C and -40 °C to +125 °C

Applications
• Wave and pulse shapers for highly noisy environments
• Astable multivibrator
• Monostable multivibrator.

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