Part Name
74LV132PW-Q100
Description
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74LV132PW-Q100 Datasheet - Nexperia B.V. All rights reserved
Nexperia B.V. All rights reserved
General description
The 74LV132-Q100 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC132-Q100 and 74HCT132-Q100.
The 74LV132-Q100 contains four 2-input NAND gates which accept standard input signals. These gates are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
Features and benefits
• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Wide operating voltage: 1.0 V to 5.5 V
• Optimized for low voltage applications: 1.0 V to 3.6 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
• Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C
• ESD protection:
• HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
• CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
• Multiple package options
• DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
Applications
• Wave and pulse shapers for highly noisy environments
• Astable multivibrators
• Monostable multivibrators
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