General description
The 74HC160 is a synchronous presettable decade counter with an internal look-ahead carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HIGH or LOW. A LOW at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET). A LOW at the master reset input (MR) sets Q0 to Q3 LOW regardless of the levels at input pins CP, PE, CET and CEP (thus providing an asynchronous clear function). The look-ahead carry simplifies serial cascading of the counters.

FEATUREs and benefits
• Complies with JEDEC standard no. 7A
• CMOS input levels
• Synchronous counting and loading
• 2 count enable inputs for n-bit cascading
• Asynchronous reset
• Positive-edge triggered clock
• ESD protection:
   • HBM JESD22-A114F exceeds 2000 V
   • MM JESD22-A115-A exceeds 200 V
• Specified from -40 °C to +85 °C and -40 °C to +125 °C