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74F113 Datasheet - Fairchild Semiconductor

74F113 image

Part Name
74F113

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page
6 Pages

File Size
58.1 kB

MFG CO.
Fairchild
Fairchild Semiconductor 

General Description
The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered.
The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as long as minimum setup and hold times are observed.

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Part Name
Description
View
MFG CO.
Dual JK negative edge-triggered flip-flop
PDF
Motorola => Freescale
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
PDF
Motorola => Freescale
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
PDF
Motorola => Freescale
Dual JK negative edge-triggered flip-flop
PDF
Motorola => Freescale
Dual JK Negative Edge-Triggered Flip-Flop
PDF
Hitachi -> Renesas Electronics
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
PDF
Motorola => Freescale
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
PDF
Motorola => Freescale
Dual JK negative edge-triggered flip-flop
PDF
Motorola => Freescale
Dual JK Negative Edge-Triggered Flip-Flop
PDF
AVG Semiconductors=>HITEK
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
PDF
Motorola => Freescale

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