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74CBTLV1G125GV Datasheet - NXP Semiconductors.

74CBTLV1G125 image

Part Name
74CBTLV1G125GV

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page
18 Pages

File Size
137.9 kB

MFG CO.
NXP
NXP Semiconductors. 

General description
   The 74CBTLV1G125 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
   Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 2.3 V to 3.6 V.

Features
■ Supply voltage range from 2.3 V to 3.6 V
■ High noise immunity
■ Complies with JEDEC standard:
   ◆ JESD8-5 (2.3 V to 2.7 V)
   ◆ JESD8-B/JESD36 (2.7 V to 3.6 V)
■ ESD protection:
   ◆ HBM JESD22-A114-D exceeds 2000 V
   ◆ MM JESD22-A115-A exceeds 200 V
   ◆ CDM JESD22-C101-C exceeds 1000 V
■ 5 Ω switch connection between two ports
■ Rail to rail switching on data I/O ports
■ CMOS low power consumption
■ Latch-up performance meets requirements of JESD78 Class I
■ IOFF circuitry provides partial power down mode operation
■ Multiple package options
■ Specified from −40 °C to +85 °C and −40 °C to +125 °C


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