Philips Semiconductors
Multistandard vision and sound-IF PLL with
DVB-IF processing
Product specification
TDA9819
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP.
IFPLL(offset)
FPLL offset current at pin 7
note 8
Composite video amplifier (pin 21; sound carrier off)
−
−
Vo video(p-p)
V21(sync)
V21(clu)
V21(cll)
Ro,21
Iint 21
I21 max(sink)
I21 max(source)
B−1
B−3
αH
PSRR
output signal voltage
(peak-to-peak value)
see Fig.8
sync voltage level
upper video clipping voltage level
lower video clipping voltage level
output resistance
note 2
internal DC bias current for
emitter-follower
maximum AC and DC output
sink current
maximum AC and DC output
source current
−1 dB video bandwidth
CL < 50 pF; RL > 1 kΩ;
AC load
−3 dB video bandwidth
CL < 50 pF; RL > 1 kΩ;
AC load
suppression of video signal
harmonics
CL < 50 pF; RL > 1 kΩ;
AC load; note 9
power supply ripple rejection at video signal; grey level; see
pin 21
Fig.9
M and B/G standard
L standard
0.88 1.0
−
1.5
VP − 1.1 VP − 1
−
0.7
−
−
1.6
2.0
1.0
−
2.0
−
5
6
7
8
35
40
32
35
26
30
CVBS buffer amplifier (only) and noise clipper (pins 10 and 22)
Ri,22
input resistance
note 2
2.6
3.3
Ci,22
input capacitance
note 2
1.4
2
VI,22
DC input voltage
1.5
1.8
Gv
voltage gain
M, B/G and L standard;
6.5
7
note 10
V10(clu)
V10(cll)
upper video clipping voltage level
lower video clipping voltage level
3.9
4.0
−
1.0
Ro,10
output resistance
note 2
−
−
Iint 10
DC internal bias current for
emitter-follower
2.0
2.5
Io,10 max(sink) maximum AC and DC output
sink current
1.4
−
Io,10 max(source) maximum AC and DC output
source current
2.4
−
B−1
−1 dB video bandwidth
CL < 20 pF; RL > 1 kΩ;
8.4
11
AC load
B−3
−3 dB video bandwidth
CL < 20 pF; RL > 1 kΩ;
11
14
AC load
MAX. UNIT
±4.5 µA
1.12 V
−
V
−
V
0.9
V
10
Ω
−
mA
−
mA
−
mA
−
MHz
−
MHz
−
dB
−
dB
−
dB
4.0
kΩ
3.0
pF
2.1
V
7.5
dB
−
V
1.1
V
10
Ω
−
mA
−
mA
−
mA
−
MHz
−
MHz
1998 Jul 14
10